1. Field of the Invention
The present invention relates to resistors fabricated on a substrate. In particular, the present invention is a mesh resistor network from which some resistor elements can be cut to select a desired resistance value.
2. Description of the Prior Art
Many analog and other integrated circuits require precise matching of the resistance values of resistors fabricated thereon to achieve desired overall circuit precision. The "natural" level of matching for integrated circuit resistors (i.e., that achievable by controlling parameters of the manufacturing process) is approximately 0.1-0.3%. For some circuits such as high-precision analog-to-digital and digital-to-analog converters, this degree of precision is inadequate. To produce such high-precision devices, various forms of post-fabrication trimming have been deviced to adjust the resistance value of one resistor of the matched pair. Known techniques include laser trimming or cutting, Zener-zapping, and metal-link cutting and blowing.
Other integrated circuits include individual resistors which must be trimmed to an absolute resistance value. In applications of these types, untrimmed accuracies on the order of only 15-20% are typical due to the wide manufacturing variations in sheet resistance of the integrated circuit.
Laser trimming involves the use of a laser to alter the shape of a resistor region and thereby bring its resistance to the desired value. "Top hat", "L-cut" and other trim patterns are commonly used.
Serious problems arise from aging and annealing effects resulting from this technique. The "partially zapped" material along the edge of the cut trim path often has different properties from undisturbed material, and its resistance ages (anneals) at a different rate than the body of the resistor. This can give rise to a situation where a resistor pair which initially trimmed to a precise ration exhibits a slow variation of the ratio due to aging effects. As a result, the circuit gradually drifts out of specification during usage.
To avoid aging problems, it is known to use a trimming geometry in which resistive links are either totally cut, or left undisturbed. The infinite resistance of a cut link is unaffected by aging. Known techniques which make use of this property include a set of resistive links which are connected in a parallel geometry. However, if N links are used, the resolution of the trim is only 1/N. Trim resolutions can be increased by using binary-weighted links with values in the ratios of 1, 2, 4, etc. A problem with these parallel-connected geometry arrangements is that although the spacing between conductance values is uniform, the spacing between resistance values is not.
Still another known approach for adjusting the resistance value of resistors on integrated circuits is one in which the resistive links are shorted by metal. The metal shorts are blown open with a current pulse or laser beam. Again, binary weighting offers advantages. One practical disadvantage of such schemes is that laser trimming of metal requires much higher power than for resistive films, tends to disrupt the chip passivation, and thereby creates reliability hazards.
Clearly, there is a continuing need for improved integrated circuit resistor networks and methods for selecting the resistance value thereof. The resistor network and method will preferably be applicable to both resistor matching applications, and the selection of absolute resistor values. The resistor network itself must be compact so as to utilize little space on the integrated circuit, permit a wide trim range (i.e., large Rmax/Rmin), and have a high resolution (i.e. small intervals between adjacent trimmed values). A network capable of providing resistance values uniformly spaced in resistance in also desirable. The network and method should also be capable of implementation using currently available technology.